Nand Flash/Pc Card Controller Registers - STMicroelectronics STM32F405 Reference Manual

Flexible memory controller (FMC)
Table 289. 16-bit PC-Card signals and access type (continued)
X 0 0 0
X 0 0 0
1 0 0 0
0 1 0 0
1 0 0 1
1 0 0 1
1 0 0 1
1 0 0 1
0 0 0 1
0 0 0 1
0 1 0 1
0 1 0 1
FMC Bank 4 gives access to those 3 memory spaces as described in
Flash memory/PC Card address mapping
and timing
Wait feature
The CompactFlash or PC Card may request the FMC to extend the length of the access
phase programmed by MEMWAITx/ATTWAITx/IOWAITx bits, asserting the nWAIT signal
after nOE/nWE or nIORD/nIOWR activation if the wait feature is enabled through the
PWAITEN bit in the FMC_PCRx register. To detect correctly the nWAIT assertion, the
MEMWAITx/ATTWAITx/IOWAITx bits must be programmed as follows:
where max_wait_assertion_time is the maximum time taken by NWAIT to go low once
nOE/nWE or nIORD/nIOWR is low.
After WAIT de-assertion, the FMC extends the WAIT phase for 4 HCLK clock cycles.
37.6.8

NAND Flash/PC Card controller registers

PC Card/NAND Flash control registers 2..4 (FMC_PCR2..4)
Address offset: 0x40 + 0x20 * (x – 1), x = 2..4
Reset value: 0x0000 0018
1642/1731
1 0 1 X-X 0
1 0 0 X-X 0
1 X X X-X 1
1 X X X-X x
0 X X X-X 0
0 X X X-X 1
0 X X X-X 0
0 X X X-X 1
0 X X X-X 0
0 X X X-X 0
0 X X X-X X
0 X X X-X X
registers.
xxWAITx
DocID018909 Rev 11
Space Access type
Read or Write Configuration
Registers
Attribute
Space
Read or Write CIS (Card
Information Structure)
Invalid Read or Write (odd
address)
Attribute
Space
Invalid Read or Write (odd
address)
Read Even Byte on D7-0
Read Odd Byte on D7-0
Write Even Byte on D7-0
Write Odd Byte on D7-0
I/O space
Read Word on D15-0
Write word on D15-0
Read Odd Byte on D15-8
Write Odd Byte on D15-8
and Table 251: NAND/PC Card memory mapping
max_wait_assertion_time
≥
4
+ ------------------------------------------------------------------ -
HCLK
RM0090
Allowed/not
Allowed
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
Not supported
Not supported
Section 37.4.2: NAND