Figure 377. Txdma Operation In Default Mode - STMicroelectronics STM32F405 Reference Manual

Advanced arm-based 32-bit mcus
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Ethernet (ETH): media access control (MAC) with DMA controller
TxDMA operation: OSF mode
While in the Run state, the transmit process can simultaneously acquire two frames without
closing the Status descriptor of the first (if the OSF bit is set in ETH_DMAOMR register[2]).
As the transmit process finishes transferring the first frame, it immediately polls the transmit
descriptor list for the second frame. If the second frame is valid, the transmit process
transfers this frame before writing the first frame's status information. In OSF mode, the
Run-state transmit DMA operates according to the following sequence:
1160/1731

Figure 377. TxDMA operation in Default mode

Poll demand
TxDMA suspended
No
No
Close intermediate
descriptor
No
DocID018909 Rev 11
Start TxDMA
Start
(Re-)fetch next
descriptor
(AHB)
error?
No
Own
bit set?
Yes
Transfer data from
buffer(s)
(AHB)
error?
No
Frame xfer
complete?
Yes
Wait for Tx status
Time stamp
Yes
present?
No
Write status word
No
to TDES0
(AHB)
error?
Stop TxDMA
Yes
Yes
Write time stamp to
TDES2 and TDES3
(AHB)
Yes
error?
Yes
ai15639
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