Table 272. Fmc_Bcrx Bit Fields; Table 273. Fmc_Btrx Bit Fields - STMicroelectronics STM32F405 Reference Manual

Flexible memory controller (FMC)
Bit No.
31-21
20
19
18:16
15
14
13
12
11
10
9
8
7
6
5-4
3-2
1
0
Bit No.
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
1614/1731

Table 272. FMC_BCRx bit fields

Bit name
Reserved 0x000
CCLKEN As needed
CBURSTRW 0x0 (no effect in asynchronous mode)
Reserved 0x0 (no effect in asynchronous mode)
ASYNCWAIT Set to 1 if the memory supports this feature. Otherwise keep at 0.
EXTMOD 0x1
WAITEN 0x0 (no effect in asynchronous mode)
WREN As needed
WAITCFG Don't care
WRAPMOD 0x0
WAITPOL Meaningful only if bit 15 is 1
BURSTEN 0x0
Reserved 0x1
FACCEN 0x1
MWID As needed
MTYP[1:0] 0x02 (NOR Flash memory)
MUXEN 0x0
MBKEN 0x1

Table 273. FMC_BTRx bit fields

Bit name
Reserved 0x0
ACCMOD 0x2
DATLAT 0x0
CLKDIV 0x0
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST HCLK cycles) for
DATAST
read accesses.
ADDHLD Don't care
Duration of the first access phase (ADDSET HCLK cycles) for read
ADDSET[3:0]
accesses. Minimum value for ADDSET is 0.
DocID018909 Rev 11
Value to set
Value to set
RM0090