STMicroelectronics STM32F405 Reference Manual page 1588

Flexible static memory controller (FSMC)
Offset Register
FSMC_BWTR
0114 Res.
3
FSMC_BWTR
011C Res.
4
0xA000
FSMC_PCR2
0060
0xA000
FSMC_PCR3
0080
0xA000
FSMC_PCR4
00A0
0xA000
FSMC_SR2
0064
0xA000
FSMC_SR3
0084
0xA000
FSMC_SR4
00A4
0xA000 FSMC_PMEM
0068 2
0xA000 FSMC_PMEM
0088 3
0xA000 FSMC_PMEM
00A8 4
0xA000
FSMC_PATT2
006C
0xA000
FSMC_PATT3
008C
0xA000
FSMC_PATT4
00AC
0xA000
FSMC_PIO4
00B0
0xA000
FSMC_ECCR2
0074
0xA000
FSMC_ECCR3
0094
Refer to Section: Memory map for the register boundary addresses.
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Table 248. FSMC register map (continued)
ACC
MOD Res.
[1:0]
ACC
MOD Res.
[1:0]
Reserved
Reserved
Reserved
MEMHIZ[7:0] MEMHOLD[7:0]
MEMHIZ[7:0] MEMHOLD[7:0]
MEMHIZ[7:0] MEMHOLD[7:0]
ATTHIZ[7:0] ATTHOLD[7:0]
ATTHIZ[7:0] ATTHOLD[7:0]
ATTHIZ[7:0] ATTHOLD[7:0]
IOHIZ[7:0] IOHOLD[7:0]
DocID018909 Rev 11
Reserved
Reserved
Reserved
MEMWAIT[7:0]
MEMWAIT[7:0]
MEMWAIT[7:0]
ATTWAIT[7:0]
ATTWAIT[7:0]
ATTWAIT[7:0]
IOWAIT[7:0]
ECC[31:0]
ECC[31:0]
RM0090
Res.
Res.
Res.
MEMSET[7:0]
MEMSET[7:0]
MEMSET[7:0]
ATTSET[7:0]
ATTSET[7:0]
ATTSET[7:0]
IOSET[7:0]