Table 292. Fmc Register Map - STMicroelectronics STM32F405 Reference Manual

RM0090
Bits 2:1 MODES1[1:0]: Status Mode for Bank 1
This bit defines the Status Mode of SDRAM Bank 1.
00: Normal Mode
01: Self-refresh mode
10: Power-down mode
Bit 0 RE: Refresh error flag
0: No refresh error has been detected
1: A refresh error has been detected
An interrupt is generated if REIE = 1 and RE = 1
37.8 FMC register map
The following table summarizes the FMC registers.
Offset Register
0x00 FMC_BCR1
0x08 FMC_BCR2
0x10 FMC_BCR3
0x18 FMC_BCR4
0x04 FMC_BTR1 Res.
0x0C FMC_BTR2 Res.
0x14 FMC_BTR3 Res.
0x1C FMC_BTR4 Res.
0x104 FMC_BWTR1 Res.

Table 292. FMC register map

Reserved
Reserved
Reserved
Reserved
DATLAT[3:0] CLKDIV[3:0] BUSTURN[3:0]
DATLAT[3:0] CLKDIV[3:0] BUSTURN[3:0]
DATLAT[3:0] CLKDIV[3:0] BUSTURN[3:0]
DATLAT[3:0] CLKDIV[3:0] BUSTURN[3:0]
Res. BUSTURN[3:0]
DocID018909 Rev 11
Flexible memory controller (FMC)
DATAST[7:0] ADDHLD[3:0] ADDSET[3:0]
DATAST[7:0] ADDHLD[3:0] ADDSET[3:0]
DATAST[7:0] ADDHLD[3:0] ADDSET[3:0]
DATAST[7:0] ADDHLD[3:0] ADDSET[3:0]
DATAST[7:0] ADDHLD[3:0] ADDSET[3:0]
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