RM0090
Flexible memory controller (FMC)
Mode 1 - SRAM/PSRAM (CRAM)
The next figures show the read and write transactions for the supported modes followed by
the required configuration of FMC _BCRx, and FMC_BTRx/FMC_BWTRx registers.
Figure 456. Mode1 read access waveforms
Figure 457. Mode1 write access waveforms
DocID018909 Rev 11
1605/1731
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