STMicroelectronics STM32F405 Reference Manual page 811

RM0090
Bits 31:17 Reserved
Bit 16 RECALPF: Recalibration pending Flag
Bit 15 Reserved, must be kept at reset value.
Bit 14 TAMP2F: TAMPER2 detection flag
Bit 13 TAMP1F: Tamper detection flag
Bit 12 TSOVF: Timestamp overflow flag
Bit 11 TSF: Timestamp flag
Bit 10 WUTF: Wakeup timer flag
Bit 9 ALRBF: Alarm B flag
Bit 8 ALRAF: Alarm A flag
Bit 7 INIT: Initialization mode
Bit 6 INITF: Initialization flag
The RECALPF status flag is automatically set to '1' when software writes to the RTC_CALR
register, indicating that the RTC_CALR register is blocked. When the new calibration
settings are taken into account, this bit returns to '0'. Refer to
fly.
This flag is set by hardware when a tamper detection event is detected on tamper input 2.
It is cleared by software writing 0.
This flag is set by hardware when a tamper detection event is detected.
It is cleared by software writing 0.
This flag is set by hardware when a timestamp event occurs while TSF is already set.
This flag is cleared by software by writing 0. It is recommended to check and then clear
TSOVF only after clearing the TSF bit. Otherwise, an overflow might not be noticed if a
timestamp event occurs immediately before the TSF bit is cleared.
This flag is set by hardware when a timestamp event occurs.
This flag is cleared by software by writing 0.
This flag is set by hardware when the wakeup auto-reload counter reaches 0.
This flag is cleared by software by writing 0.
This flag must be cleared by software at least 1.5 RTCCLK periods before WUTF is set to 1
again.
This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the
Alarm B register (RTC_ALRMBR).
This flag is cleared by software by writing 0.
This flag is set by hardware when the time/date registers (RTC_TR and RTC_DR) match the
Alarm A register (RTC_ALRMAR).
This flag is cleared by software by writing 0.
0: Free running mode
1: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and
prescaler register (RTC_PRER). Counters are stopped and start counting from the new
value when INIT is reset.
When this bit is set to 1, the RTC is in initialization state, and the time, date and prescaler
registers can be updated.
0: Calendar registers update is not allowed
1: Calendar registers update is allowed.
DocID018909 Rev 11
Real-time clock (RTC)
Section : Re-calibration on-the-
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