RM0090
35.13.3
Device initialization
The application must perform the following steps to initialize the core as a device on power-
up or after a mode change from host to device.
1.
Program the following fields in the OTG_HS_DCFG register:
–
–
2.
Program the OTG_HS_GINTMSK register to unmask the following interrupts:
–
–
–
–
–
3.
Program the VBUSBSEN bit in the OTG_HS_GCCFG register to enable V
in "B" peripheral mode and supply the 5 volts across the pull-up resistor on the DP line.
4.
Wait for the USBRST interrupt in OTG_HS_GINTSTS. It indicates that a reset has
been detected on the USB that lasts for about 10 ms on receiving this interrupt.
Wait for the ENUMDNE interrupt in OTG_HS_GINTSTS. This interrupt indicates the end of
reset on the USB. On receiving this interrupt, the application must read the OTG_HS_DSTS
register to determine the enumeration speed and perform the steps listed in
initialization on enumeration completion on page
At this point, the device is ready to accept SOF packets and perform control transfers on
control endpoint 0.
35.13.4
DMA mode
The OTG host uses the AHB master interface to fetch the transmit packet data (AHB to
USB) and receive the data update (USB to AHB). The AHB master uses the programmed
DMA address (HCDMAx register in host mode and DIEPDMAx/DOEPDMAx register in
peripheral mode) to access the data buffers.
35.13.5
Host programming model
Channel initialization
The application must initialize one or more channels before it can communicate with
connected devices. To initialize and enable a channel, the application must perform the
following steps:
Device speed
Nonzero-length status OUT handshake
USB reset
Enumeration done
Early suspend
USB suspend
SOF
DocID018909 Rev 11
USB on-the-go high-speed (OTG_HS)
1503.
sensing
BUS
Endpoint
1475/1731
1529
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