Figure 251. Ti Mode - Master Mode, Single Transfer; Figure 252. Ti Mode - Master Mode, Continuous Transfer - STMicroelectronics STM32F405 Reference Manual

RM0090 Serial peripheral interface (SPI)
SPI TI protocol in master mode
In master mode, the SPI interface is compatible with the TI protocol. The FRF bit of the
SPI_CR2 register can be used to configure the master SPI serial communications to be
compliant with this protocol.
The clock polarity and phase are forced to conform to the TI protocol requirements whatever
the values set in the SPI_CR1 register. NSS management is also specific to the TI protocol
which makes the configuration of NSS management through the SPI_CR1 and SPI_CR2
registers (SSM, SSI, SSOE) transparent for the user.
Figure 251: TI mode - master mode, single transfer and Figure 252: TI mode - master mode,
continuous transfer) show the SPI master communication waveforms when the TI mode is
selected in master mode.

Figure 251. TI mode - master mode, single transfer

Figure 252. TI mode - master mode, continuous transfer

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