Figure 458. Modea Read Access Waveforms - STMicroelectronics STM32F405 Reference Manual

RM0090
Bit
number
7-4
3-0
Mode A - SRAM/PSRAM (CRAM) OE toggling
1. NBL[3:0] are driven low during the read access
Table 265. FMC_BTRx bit fields (continued)
Bit name
ADDHLD Don't care
Duration of the first access phase (ADDSET HCLK cycles).
ADDSET
Minimum value for ADDSET is 0.

Figure 458. ModeA read access waveforms

DocID018909 Rev 11
Flexible memory controller (FMC)
Value to set
1607/1731
1669