STMicroelectronics STM32F405 Reference Manual page 821

RM0090
Bits 31:16 Reserved
Bit 15 CALP: Increase frequency of RTC by 488.5 ppm
Refer to
Bit 14 CALW8: Use an 8-second calibration cycle period
Bit 13 CALW16: Use a 16-second calibration cycle period
Note: CALM[0] is stuck at '0' when CALW16='1'.
Bits 12:9 Reserved
Bits 8:0 CALM[8:0]: Calibration minus
Note: This register is write protected. The write access procedure is described in
write protection on page 794
0: No RTCCLK pulses are added.
1: One RTCCLK pulse is effectively inserted every 2
488.5 ppm).
This feature is intended to be used in conjunction with CALM, which lowers the frequency of
the calendar with a fine resolution. if the input frequency is 32768 Hz, the number of
RTCCLK pulses added during a 32-second window is calculated as follows: (512 * CALP) -
CALM.
Section 26.3.11: RTC smooth digital
When CALW8 is set to '1', the 8-second calibration cycle period is selected.
CALM[1:0] are stuck at "00" when CALW8='1'.
Refer to Section 26.3.11: RTC smooth digital
When CALW16 is set to '1', the 16-second calibration cycle period is selected. This bit must
not be set to '1' if CALW8=1.
Refer to Section 26.3.11: RTC smooth digital
The frequency of the calendar is reduced by masking CALM out of 2
seconds if the input frequency is 32768 Hz). This decreases the frequency of the calendar
with a resolution of 0.9537 ppm.
To increase the frequency of the calendar, this feature should be used in conjunction with
CALP.
See Section 26.3.11: RTC smooth digital calibration on page
DocID018909 Rev 11
Real-time clock (RTC)
11
pulses (frequency increased by
calibration.
calibration.
calibration.
799.
20
RTCCLK pulses (32
RTC register
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