STMicroelectronics STM32F405 Reference Manual page 1308

USB on-the-go full-speed (OTG_FS)
OTG_FS device endpoint-x interrupt register (OTG_FS_DIEPINTx) (x = 0..3,
where x = Endpoint_number)
Address offset: 0x908 + (Endpoint_number × 0x20)
Reset value: 0x0000 0080
This register indicates the status of an endpoint with respect to USB- and AHB-related
events. It is shown in
endpoints interrupt bit of the Core interrupt register (IEPINT in OTG_FS_GINTSTS) is set.
Before the application can read this register, it must first read the device all endpoints
interrupt (OTG_FS_DAINT) register to get the exact endpoint number for the Device
endpoint-x interrupt register. The application must clear the appropriate bit in this register to
clear the corresponding bits in the OTG_FS_DAINT and OTG_FS_GINTSTS registers.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bits 31:8 Reserved, must be kept at reset value.
Bit 7 TXFE: Transmit FIFO empty
Bit 6 INEPNE: IN endpoint NAK effective
Bit 5 Reserved, must be kept at reset value.
Bit 4 ITTXFE: IN token received when TxFIFO is empty
Bit 3 TOC: Timeout condition
Bit 2 Reserved, must be kept at reset value.
Bit 1 EPDISD: Endpoint disabled interrupt
Bit 0 XFRC: Transfer completed interrupt
1308/1731
Figure 394. The application must read this register when the IN
Reserved
This interrupt is asserted when the TxFIFO for this endpoint is either half or completely
empty. The half or completely empty status is determined by the TxFIFO Empty Level bit in
the OTG_FS_GAHBCFG register (TXFELVL bit in OTG_FS_GAHBCFG).
This bit can be cleared when the application clears the IN endpoint NAK by writing to the
CNAK bit in OTG_FS_DIEPCTLx.
This interrupt indicates that the core has sampled the NAK bit set (either by the application
or by the core). The interrupt indicates that the IN endpoint NAK bit set by the application
has taken effect in the core.
This interrupt does not guarantee that a NAK handshake is sent on the USB. A STALL bit
takes priority over a NAK bit.
Applies to non-periodic IN endpoints only.
Indicates that an IN token was received when the associated TxFIFO (periodic/non-periodic)
was empty. This interrupt is asserted on the endpoint for which the IN token was received.
Applies only to Control IN endpoints.
Indicates that the core has detected a timeout condition on the USB for the last IN token on
this endpoint.
This bit indicates that the endpoint is disabled per the application's request.
This field indicates that the programmed transfer is complete on the AHB as well as on the
USB, for this endpoint.
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