STMicroelectronics STM32F405 Reference Manual page 1429

RM0090
Bit 2 AHBERR: AHB error
Bit 1 CHHM: Channel halted mask
Bit 0 XFRCM: Transfer completed mask
OTG_HS host channel-x transfer size register (OTG_HS_HCTSIZx) (x = 0..11,
where x = Channel_number)
Address offset: 0x510 + (Channel_number × 0x20)
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
DPID
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bit 31 DOPING: Doping
Note: Do not set this bit for IN transfers. If this bit is set for IN transfers it disables the channel.
Bits 30:29 DPID: Data PID
Bits 28:19 PKTCNT: Packet count
Bits 18:0 XFRSIZ: Transfer size
This is generated only in Internal DMA mode when there is an AHB error during AHB
read/write. The application can read the corresponding channel's DMA address register to
get the error address.
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
PKTCNT
This bit is used only for OUT transfers. Setting this field to 1 directs the host to do PING
protocol.
The application programs this field with the type of PID to use for the initial transaction. The
host maintains this field for the rest of the transfer.
00: DATA0
01: DATA2
10: DATA1
11: MDATA (noncontrol)/SETUP (control)
This field is programmed by the application with the expected number of packets to be
transmitted (OUT) or received (IN).
The host decrements this count on every successful transmission or reception of an OUT/IN
packet. Once this count reaches zero, the application is interrupted to indicate normal
completion.
For an OUT, this field is the number of data bytes the host sends during the transfer.
For an IN, this field is the buffer size that the application has reserved for the transfer. The
application is expected to program this field as an integer multiple of the maximum packet
size for IN transactions (periodic and nonperiodic).
DocID018909 Rev 11
USB on-the-go high-speed (OTG_HS)
9 8 7 6
XFRSIZ
5 4 3 2 1 0
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