Figure 318. Rts Flow Control; Figure 319. Cts Flow Control - STMicroelectronics STM32F405 Reference Manual

RM0090
RTS flow control
If the RTS flow control is enabled (RTSE=1), then nRTS is asserted (tied low) as long as the
USART receiver is ready to receive a new data. When the receive register is full, nRTS is
deasserted, indicating that the transmission is expected to stop at the end of the current
frame. Figure 318
RX
nRTS
CTS flow control
If the CTS flow control is enabled (CTSE=1), then the transmitter checks the nCTS input
before transmitting the next frame. If nCTS is asserted (tied low), then the next data is
transmitted (assuming that a data is to be transmitted, in other words, if TXE=0), else the
transmission does not occur. When nCTS is deasserted during a transmission, the current
transmission is completed before the transmitter stops.
When CTSE=1, the CTSIF status bit is automatically set by hardware as soon as the nCTS
input toggles. It indicates when the receiver becomes ready or not ready for communication.
An interrupt is generated if the CTSIE bit in the USART_CR3 register is set. The figure
below shows an example of communication with CTS flow control enabled.
nCTS
Transmit data register
TDR
TX
Note: Special behavior of break frames: when the CTS flow is enabled, the transmitter does not
check the nCTS input state to send a break.
Universal synchronous asynchronous receiver transmitter (USART)
shows an example of communication with RTS flow control enabled.

Figure 318. RTS flow control

Start
Data 1
Bit

Figure 319. CTS flow control

Data 2 empty
Stop Start
Data 1
Bit
Bit
Writing data 3 in TDR
DocID018909 Rev 11
Stop Idle Start
Bit Bit
Data 1 read
RXNE
Data 2 can now be transmitted
CTS
Data 3
Stop Idle Start
Data 2
Bit
Transmission of Data 3
is delayed until nCTS = 0
Stop
Data 2
Bit
RXNE
CTS
empty
Data 3
Bit
997/1731
1010