Table 131. Sai Register Map And Reset Values; Sai Xdata Register (Sai_Xdr) Where X Is A Or B - STMicroelectronics STM32F405 Reference Manual

Serial audio interface (SAI)
29.17.8

SAI xData register (SAI_xDR) where x is A or B

Address offset: block A: 0x020
Address offset: block B: 0x040
Reset value: 0x0000 0000
31 30 29
rw rw rw
15 14 13
rw rw rw
Bits 31:0 DATA[31:0]: Data
A write into this register has the effect of loading the FIFO if the FIFO is not full.
A read from this register has to effect of draining-up the FIFO if the FIFO is not empty.
29.17.9 SAI register map
The following table summarizes the SAI registers.
Register
Offset and reset
value
0x0004
SAI_xCR1
or
0x0024
Reset value
0x0008
SAI_xCR2
or 0x0028
Reset value
0x000Cor
SAI_xFRCR
0x002C
Reset value
SAI_xSLOTR
0x0010 or
0x0030
Reset value 0 0
0x0014
SAI_xIM
or 0x0034
Reset value
0x0018
SAI_xSR
or
0x0038
Reset value
956/1731
28 27 26 25
rw rw rw rw
12 11 10 9
rw rw rw rw

Table 131. SAI register map and reset values

0 0
SLOTEN[15:0]
0 0 0 0 0 0
0 0
DocID018909 Rev 11
24 23 22 21
DATA[31:16]
rw rw rw rw
8 7 6 5
DATA[15:0]
rw rw rw rw
0 0 0 0 0
COMP[
1:0]
0 0
0 0 0 0
0 0 0 0 0 0
0 0 0
20 19 18
rw rw rw
4 3 2
rw rw rw
SYNCE
DS[2:0]
N[1:0]
0 0 0 0 0 0 0 1
MUTECN[5:0]
0 0 0 0 0 0 0 0
FSALL[6:0]
0 0 0 0 0 0 0 0
SLOTS
NBSLOT[3:0]
Z[1:0}
0 0 0 0 0 0
0
0
RM0090
17 16
rw rw
1 0
rw rw
PRTCF MODE[
G[1:0] 1:0]
0
0 0 0 0
0 0 0 0 0 0
FRL[7:0]
0
0 0 1 1 1
FBOFF[4:0]
0 0 0 0 0
0 0 0 0 0 0
0 0 0 1 0 0