General Features - STMicroelectronics STM32F405 Reference Manual

Advanced arm-based 32-bit mcus
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USB on-the-go high-speed (OTG_HS)
35.2.1

General features

The OTG_HS interface main features are the following:
It is USB-IF certified in compliance with the Universal Serial Bus Revision 2.0
Specification
It supports 3 PHY interfaces
It supports the host negotiation protocol (HNP) and the session request protocol (SRP)
It allows the host to turn V
external components
It allows to monitor V
It supports dynamic host-peripheral role switching
It is software-configurable to operate as:
It supports HS/FS SOFs as well as low-speed (LS) keep-alive tokens with:
It embeds an internal DMA with shareholding support and software selectable AHB
burst type in DMA mode
It has power saving features such as system clock stop during USB suspend, switching
off of the digital core internal clock domains, PHY and DFIFO power management
It features a dedicated 4-Kbyte data RAM with advanced FIFO management:
It ensures a maximum USB bandwidth of up to one frame without application
intervention
1370/1731
An on-chip full-speed PHY
2
An I
C Interface for external full-speed I
An ULPI interface for external high-speed PHY.
BUS
levels using internal comparators
BUS
An SRP-capable USB HS/FS peripheral (B-device)
An SRP-capable USB HS/FS/low-speed host (A-device)
An USB OTG FS dual-role device
SOF pulse PAD output capability
SOF pulse internal connection to timer 2 (TIM2)
Configurable framing period
Configurable end-of-frame interrupt
The memory partition can be configured into different FIFOs to allow flexible and
efficient use of RAM
Each FIFO can contain multiple packets
Memory allocation is performed dynamically
The FIFO size can be configured to values that are not powers of 2 to allow the
use of contiguous memory locations
DocID018909 Rev 11
2
C PHY
off to save power in OTG applications, with no need for
RM0090

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