Table 205. Device-Mode Control And Status Registers - STMicroelectronics STM32F405 Reference Manual

RM0090
Table 204. Host-mode control and status registers (CSRs) (continued)
Acronym
OTG_HS_HCCHARx
OTG_HS_HCSPLTx
OTG_HS_HCINTx
OTG_HS_HCINTMSKx 0x50C
OTG_HS_HCTSIZx
OTG_HS_HCDMAx
Device-mode CSR map
These registers must be programmed every time the core changes to peripheral mode.
Acronym
OTG_HS_DCFG
OTG_HS_DCTL
OTG_HS_DSTS
OTG_HS_DIEPMSK
OTG_HS_DOEPMSK
OTG_HS_DAINT
OTG_HS_DAINTMSK
OTG_HS_DVBUSDIS
OTG_HS_DVBUSPULSE
OTG_HS_DIEPEMPMSK
Offset
address
0x500
0x520
OTG_HS host channel-x characteristics register (OTG_HS_HCCHARx)
(x = 0..11, where x = Channel_number) on page 1424
...
0x6E0
OTG_HS host channel-x split control register (OTG_HS_HCSPLTx)
0x504
(x = 0..11, where x = Channel_number) on page 1426
OTG_HS host channel-x interrupt register (OTG_HS_HCINTx) (x = 0..11,
0x508
where x = Channel_number) on page 1427
OTG_HS host channel-x interrupt mask register (OTG_HS_HCINTMSKx)
(x = 0..11, where x = Channel_number) on page 1428
OTG_HS host channel-x transfer size register (OTG_HS_HCTSIZx)
0x510
(x = 0..11, where x = Channel_number) on page 1429
OTG_HS host channel-x DMA address register (OTG_HS_HCDMAx)
0x514
(x = 0..11, where x = Channel_number) on page 1430

Table 205. Device-mode control and status registers

Offset
address
OTG_HS device configuration register (OTG_HS_DCFG) on
0x800
page 1430
0x804 OTG_HS device control register (OTG_HS_DCTL) on page 1432
0x808 OTG_HS device status register (OTG_HS_DSTS) on page 1434
OTG_HS device IN endpoint common interrupt mask register
0x810
(OTG_HS_DIEPMSK) on page 1435
OTG_HS device OUT endpoint common interrupt mask register
0x814
(OTG_HS_DOEPMSK) on page 1436
OTG_HS device all endpoints interrupt register (OTG_HS_DAINT)
0x818
on page 1437
OTG_HS all endpoints interrupt mask register
0x81C
(OTG_HS_DAINTMSK) on page 1437
OTG_HS device VBUS discharge time register
0x828
(OTG_HS_DVBUSDIS) on page 1438
OTG_HS device VBUS pulsing time register
0x82C
(OTG_HS_DVBUSPULSE) on page 1438
OTG_HS device IN endpoint FIFO empty interrupt mask register:
0x834
(OTG_HS_DIEPEMPMSK) on page 1440
DocID018909 Rev 11
USB on-the-go high-speed (OTG_HS)
Register name
Register name
1391/1731
1529