Table 286. 16-Bit Nand Flash; Table 287. 16-Bit Pc Card - STMicroelectronics STM32F405 Reference Manual

Flexible memory controller (FMC)
16-bit NAND Flash memory
FMC signal name
NOE(= NRE)
NWAIT/INT[3:2]
Theoretically, there is no capacity limitation as the FMC can manage as many address
cycles as needed.
FMC signal name
A[10:0]
NIORD
NIOWR
NREG
D[15:0]
NCE4_1
NCE4_2
NOE
NWE
NWAIT
INTR
1636/1731

Table 286. 16-bit NAND Flash

I/O
A[17] O
A[16] O
D[15:0] I/O
NCE[x] O
O
NWE O
I
I/O
O Address bus
O Output enable for I/O space
O Write enable for I/O space
O Register signal indicating if access is in Common or Attribute space
I/O Bidirectional databus
O Chip Select 1
O Chip Select 2 (indicates if access is 16-bit or 8-bit)
O Output enable in Common and in Attribute space
O Write enable in Common and in Attribute space
I PC Card wait input signal to the FMC (memory signal name IORDY)
PC Card interrupt to the FMC (only for PC Cards that can generate
I
an interrupt)
PC Card presence detection. Active high. If an access is performed
CD I to the PC Card banks while CD is low, an AHB error is generated.
Refer to
DocID018909 Rev 11
NAND Flash address latch enable (ALE) signal
NAND Flash command latch enable (CLE) signal
16-bit multiplexed, bidirectional address/data bus
Chip Select, x = 2, 3
Output enable (memory signal name: read enable, NRE)
Write enable
NAND Flash ready/busy input signal to the FMC

Table 287. 16-bit PC Card

Section 37.3: AHB interface
Function
Function
RM0090