STMicroelectronics STM32F405 Reference Manual page 1426

Advanced arm-based 32-bit mcus
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USB on-the-go high-speed (OTG_HS)
OTG_HS host channel-x split control register (OTG_HS_HCSPLTx) (x = 0..11,
where x = Channel_number)
Address offset: 0x504 + (Channel_number × 0x20)
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
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Bit 31 SPLITEN: Split enable
Bits 30:17
Bit 16 COMPLSPLT: Do complete split
Bits 15:14 XACTPOS: Transaction position
Bits 13:7 HUBADDR: Hub address
Bits 6:0 PRTADDR: Port address
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The application sets this bit to indicate that this channel is enabled to perform split
transactions.
Reserved, must be kept at reset value.
The application sets this bit to request the OTG host to perform a complete split transaction.
This field is used to determine whether to send all, first, middle, or last payloads with each
OUT transaction.
11: All. This is the entire data payload of this transaction (which is less than or equal to 188
bytes)
10: Begin. This is the first data payload of this transaction (which is larger than 188 bytes)
00: Mid. This is the middle payload of this transaction (which is larger than 188 bytes)
01: End. This is the last payload of this transaction (which is larger than 188 bytes)
This field holds the device address of the transaction translator's hub.
This field is the port number of the recipient transaction translator.
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