STMicroelectronics STM32F405 Reference Manual page 1402

Advanced arm-based 32-bit mcus
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USB on-the-go high-speed (OTG_HS)
Bit 4 RXFFLSH: RxFIFO flush
The application can flush the entire RxFIFO using this bit, but must first ensure that the core
is not in the middle of a transaction.
The application must only write to this bit after checking that the core is neither reading from
the RxFIFO nor writing to the RxFIFO.
The application must wait until the bit is cleared before performing any other operation. This
bit requires 8 clocks (slowest of PHY or AHB clock) to be cleared.
Note: Accessible in both peripheral and host modes.
Bit 3
Reserved, must be kept at reset value.
1402/1731
DocID018909 Rev 11
RM0090

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