STMicroelectronics STM32F405 Reference Manual page 1191

Advanced arm-based 32-bit mcus
Table of Contents

Advertisement

RM0090
Bit 2 RFCE: Receive flow control enable
Bit 1 TFCE: Transmit flow control enable
Bit 0 FCB/BPA: Flow control busy/back pressure activate
Ethernet MAC VLAN tag register (ETH_MACVLANTR)
Address offset: 0x001C
Reset value: 0x0000 0000
The VLAN tag register contains the IEEE 802.1Q VLAN Tag to identify the VLAN frames.
The MAC compares the 13
0x8100, and the following 2 bytes are compared with the VLAN tag; if a match occurs, the
received VLAN bit in the receive frame status is set. The legal length of the frame is
increased from 1518 bytes to 1522 bytes.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Reserved
Ethernet (ETH): media access control (MAC) with DMA controller
When this bit is set, the MAC decodes the received Pause frame and disables its transmitter
for a specified (Pause Time) time.
When this bit is reset, the decode function of the Pause frame is disabled.
In Full-duplex mode, when this bit is set, the MAC enables the flow control operation to
transmit Pause frames. When this bit is reset, the flow control operation in the MAC is
disabled, and the MAC does not transmit any Pause frames.
In Half-duplex mode, when this bit is set, the MAC enables the back-pressure operation.
When this bit is reset, the back pressure feature is disabled.
This bit initiates a Pause Control frame in Full-duplex mode and activates the back pressure
function in Half-duplex mode if TFCE bit is set.
In Full-duplex mode, this bit should be read as 0 before writing to the Flow control register.
To initiate a Pause control frame, the Application must set this bit to 1. During a transfer of
the Control frame, this bit continues to be set to signify that a frame transmission is in
progress. After completion of the Pause control frame transmission, the MAC resets this bit
to 0. The Flow control register should not be written to until this bit is cleared.
In Half-duplex mode, when this bit is set (and TFCE is set), back pressure is asserted by the
MAC core. During back pressure, when the MAC receives a new frame, the transmitter
starts sending a JAM pattern resulting in a collision. When the MAC is configured to Full-
duplex mode, the BPA is automatically disabled.
th
and 14
DocID018909 Rev 11
th
bytes of the receiving frame (Length/Type) with
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
9
8
7
6
5
4
3
VLANTI
2
1
0
1191/1731
1232

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32F405 and is the answer not in the manual?

Questions and answers

Table of Contents

Save PDF