Figure 367. Reception With No Error; Figure 368. Reception With Errors; Figure 369. Reception With False Carrier Indication; Mac Interrupts - STMicroelectronics STM32F405 Reference Manual

RM0090
MII_RX_CLK
MII_RX_DV
MII_RXD[3:0]
MII_RX_ERR
MII_RX_CLK
MII_RX_DV
MII_RXD[3:0]
MII_RX_ERR
MII_RX_CLK
MII_RX_DV
MII_RXD[3:0]
MII_RX_ERR
33.5.4

MAC interrupts

Interrupts can be generated from the MAC core as a result of various events.
The ETH_MACSR register describes the events that can cause an interrupt from the MAC
core. You can prevent each event from asserting the interrupt by setting the corresponding
mask bits in the Interrupt Mask register.
Ethernet (ETH): media access control (MAC) with DMA controller

Figure 367. Reception with no error

PREAMBLE

Figure 368. Reception with errors

PREAMBLE SFD

Figure 369. Reception with false carrier indication

XX XX XX XX
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SFD
DA DA XX
0E XX XX
FCS
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XX XX
XX XX
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ai15636
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