RM0090
The sequence of operations is as follows:
a)
b)
c)
d)
e)
Figure 419. Bulk/control IN transactions - Slave mode
Initialize channel 2.
Set the CHENA bit in HCCHAR2 to write an IN request to the nonperiodic request
queue.
The core attempts to send an IN token after completing the current OUT
transaction.
The core generates an RXFLVL interrupt as soon as the received packet is written
to the receive FIFO.
In response to the RXFLVL interrupt, mask the RXFLVL interrupt and read the
received packet status to determine the number of bytes received, then read the
DocID018909 Rev 11
USB on-the-go high-speed (OTG_HS)
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