Real-time clock (RTC)
26.6
RTC registers
Refer to Section: List of abbreviations for registers for a list of abbreviations used in register
descriptions.
The peripheral registers have to be accessed by words (32 bits).
26.6.1
RTC time register (RTC_TR)
The RTC_TR is the calendar time shadow register. This register must be written in
initialization mode only. Refer to
Reading the calendar on page
Address offset: 0x00
Backup domain reset value: 0x0000 0000
System reset: 0x0000 0000 when BYPSHAD = 0. Not affected when BYPSHAD = 1.
31
30
29
15
14
13
MNT[2:0]
Res.
rw
rw
Bits 31-24 Reserved
Bit 23 Reserved, must be kept at reset value.
Bit 22 PM: AM/PM notation
Bits 21:20 HT[1:0]: Hour tens in BCD format
Bits 19:16 HU[3:0]: Hour units in BCD format
Bit 15 Reserved, must be kept at reset value.
Bits 14:12 MNT[2:0]: Minute tens in BCD format
Bit 11:8 MNU[3:0]: Minute units in BCD format
Bit 7 Reserved, must be kept at reset value.
Bits 6:4 ST[2:0]: Second tens in BCD format
Bits 3:0 SU[3:0]: Second units in BCD format
Note:
This register is write protected. The write access procedure is described in
write protection on page
806/1731
28
27
26
25
Reserved
12
11
10
9
MNU[3:0]
rw
rw
rw
rw
0: AM or 24-hour format
1: PM
794.
DocID018909 Rev 11
Calendar initialization and configuration on page 794
795.
24
23
22
PM
rw
8
7
6
Res.
rw
rw
21
20
19
18
HT[1:0]
rw
rw
rw
rw
5
4
3
ST[2:0]
rw
rw
rw
rw
RM0090
and
17
16
HU[3:0]
rw
rw
2
1
0
SU[3:0]
rw
rw
RTC register
Need help?
Do you have a question about the STM32F405 and is the answer not in the manual?
Questions and answers