Rtc Write Protection Register (Rtc_Wpr) - STMicroelectronics STM32F405 Reference Manual

Advanced arm-based 32-bit mcus
Table of Contents

Advertisement

RM0090
Note:
This register can be written only when ALRBWF is set to 1 in RTC_ISR, or in initialization
mode.
This register is write protected. The write access procedure is described in
write protection on page
26.6.10

RTC write protection register (RTC_WPR)

Address offset: 0x24
Backup domain reset value: 0x0000 0000
31
30
29
15
14
13
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:0 KEY: Write protection key
This byte is written by software.
Reading this byte always returns 0x00.
Refer to
protection.
26.6.11
RTC sub second register (RTC_SSR)
Address offset: 0x28
Backup domain reset value: 0x0000 0000
System reset: 0x0000 0000 when BYPSHAD = 0. Not affected when BYPSHAD = 1.
31
30
29
r
r
r
15
14
13
r
r
r
Bits 31:16 Reserved
Bits 15:0 SS: Sub second value
SS[15:0] is the value in the synchronous prescaler's counter. The fraction of a second is
given by the formula below:
Second fraction = ( PREDIV_S - SS ) / ( PREDIV_S + 1 )
Note: SS can be larger than PREDIV_S only after a shift operation. In that case, the correct
794.
28
27
26
25
12
11
10
9
Reserved
RTC register write protection
28
27
26
25
r
r
r
r
12
11
10
9
r
r
r
r
time/date is one second less than as indicated by RTC_TR/RTC_DR.
DocID018909 Rev 11
24
23
22
21
Reserved
8
7
6
5
w
w
w
for a description of how to unlock RTC register write
24
23
22
21
Reserved
r
r
r
r
8
7
6
5
SS[15:0]
r
r
r
r
Real-time clock (RTC)
RTC register
20
19
18
17
4
3
2
1
KEY
w
w
w
w
20
19
18
17
r
r
r
r
4
3
2
1
r
r
r
r
16
0
w
16
r
0
r
817/1731
828

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32F405 and is the answer not in the manual?

Table of Contents

Save PDF