Figure 362. Transmission Bit Order; Figure 363. Transmission With No Collision - STMicroelectronics STM32F405 Reference Manual

RM0090 Ethernet (ETH): media access control (MAC) with DMA controller

Figure 362. Transmission bit order

LSB MSB
D0 D1 Bibit stream
LSB D0
D1
MII_TXD[3:0]
D2
MSB D3
Nibble stream
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MII/RMII transmit timing diagrams

Figure 363. Transmission with no collision

MII_TX_CLK
MII_TX_EN
MII_TXD[3:0]
PR EA MB LE
MII_CS
MII_COL
Low
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