Table 230. Fsmc_Btrx Bit Fields; Table 231. Fsmc_Bwtrx Bit Fields - STMicroelectronics STM32F405 Reference Manual

Flexible static memory controller (FSMC)
Bit No.
1
0
Bit
number
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
Bit
number
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
1550/1731
Table 229. FSMC_BCRx bit fields (continued)
Bit name
MUXEN
MBKEN

Table 230. FSMC_BTRx bit fields

Bit name
Reserved 0x0
ACCMOD 0x2
DATLAT 0x0
CLKDIV 0x0
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST HCLK cycles) for
DATAST
read accesses.
ADDHLD Don't care
Duration of the first access phase (ADDSET HCLK cycles) for read
accesses.
ADDSET[3:0]
Minimum value for ADDSET is 0.

Table 231. FSMC_BWTRx bit fields

Bit name
Reserved 0x0
ACCMOD 0x2
DATLAT Don't care
CLKDIV Don't care
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST+1 HCLK cycles for
DATAST
write accesses,
ADDHLD Don't care
Duration of the first access phase (ADDSET HCLK cycles) for write
accesses.
ADDSET[3:0]
Minimum value for ADDSET is 0.
DocID018909 Rev 11
0x0
0x1
Value to set
Value to set
Value to set
RM0090