Figure 364. Transmission With Collision; Figure 365. Frame Transmission In Mmi And Rmii Modes; Mac Frame Reception - STMicroelectronics STM32F405 Reference Manual

Advanced arm-based 32-bit mcus
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Ethernet (ETH): media access control (MAC) with DMA controller
MII_TX_CLK
MII_TX_EN
MII_TXD[3:0]
MII_CS
MII_COL
Figure 365
MII_RX_CLK
MII_TX_EN
MII_TXD[3:0]
RMII_REF_CLK
RMII_TX_EN
RMII_TXD[1:0]
33.5.3

MAC frame reception

The MAC received frames are pushes into the Rx FIFO. The status (fill level) of this FIFO is
indicated to the DMA once it crosses the configured receive threshold (RTC in the
ETH_DMAOMR register) so that the DMA can initiate pre-configured burst transfers
towards the AHB interface.
In the default Cut-through mode, when 64 bytes (configured with the RTC bits in the
ETH_DMAOMR register) or a full packet of data are received into the FIFO, the data are
popped out and the DMA is notified of its availability. Once the DMA has initiated the
transfer to the AHB interface, the data transfer continues from the FIFO until a complete
1136/1731

Figure 364. Transmission with collision

PR
EAM
shows a frame transmission in MII and RMII.

Figure 365. Frame transmission in MMI and RMII modes

DocID018909 Rev 11
BLE
SFD
DA
DA
JAM
JAM
JAM
JAM
RM0090
ai15651
ai15652

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