RM0090
Bit
number
5-4
3-2
1
0
Bit
number
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
Bit
number
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
Table 266. FMC_BCRx bit fields (continued)
Bit name
MWID
As needed
MTYP[1:0]
As needed, exclude 0x2 (NOR Flash memory)
MUXEN
0x0
MBKEN
0x1
Table 267. FMC_BTRx bit fields
Bit name
Reserved
0x0
ACCMOD
0x0
DATLAT
Don't care
CLKDIV
Don't care
BUSTURN
Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST HCLK cycles) for read
DATAST
accesses.
ADDHLD
Don't care
Duration of the first access phase (ADDSET HCLK cycles) for read
accesses.
ADDSET[3:0]
Minimum value for ADDSET is 0.
Table 268. FMC_BWTRx bit fields
Bit name
Reserved
0x0
ACCMOD
0x0
DATLAT
Don't care
CLKDIV
Don't care
BUSTURN
Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST HCLK cycles) for write
DATAST
accesses.
ADDHLD
Don't care
Duration of the first access phase (ADDSET HCLK cycles) for write
accesses.
ADDSET[3:0]
Minimum value for ADDSET is 0.
DocID018909 Rev 11
Flexible memory controller (FMC)
Value to set
Value to set
Value to set
1609/1731
1669
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