STMicroelectronics STM32F405 Reference Manual page 1451

RM0090
Bit 6 INEPNE: IN endpoint NAK effective
Bit 5
Bit 4 ITTXFE: IN token received when TxFIFO is empty
Bit 3 TOC: Timeout condition
Bit 2
Bit 1 EPDISD: Endpoint disabled interrupt
Bit 0 XFRC: Transfer completed interrupt
This bit can be cleared when the application clears the IN endpoint NAK by writing to the
CNAK bit in OTG_HS_DIEPCTLx.
This interrupt indicates that the core has sampled the NAK bit set (either by the application
or by the core). The interrupt indicates that the IN endpoint NAK bit set by the application
has taken effect in the core.
This interrupt does not guarantee that a NAK handshake is sent on the USB. A STALL bit
takes priority over a NAK bit.
Reserved, must be kept at reset value.
Applies to nonperiodic IN endpoints only.
Indicates that an IN token was received when the associated TxFIFO (periodic/nonperiodic)
was empty. This interrupt is asserted on the endpoint for which the IN token was received.
Applies only to Control IN endpoints.
Indicates that the core has detected a timeout condition on the USB for the last IN token on
this endpoint.
Reserved, must be kept at reset value.
This bit indicates that the endpoint is disabled per the application's request.
This field indicates that the programmed transfer is complete on the AHB as well as on the
USB, for this endpoint.
DocID018909 Rev 11
USB on-the-go high-speed (OTG_HS)
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