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Development Capabilities and Interface
20.6.4 Development Port Data Register
The special-purpose development port data register (DPDR) physically resides in the
development port logic. It is used for data interchange between the core and development
system. An access to this register is initiated using the mtspr and mfspr instructions and it
is implemented using a special bus cycle on the internal bus. For details, see Table 6-9.
DPDR
BIT
0
1
2
FIELD
RESET
R/W
SPR
BIT
16
17
18
FIELD
RESET
R/W
SPR
NOTE: — = Undefined.
DPDV—Development Port Data Value
This field contains the data to be transferred between the core and the development system.
DPIR
BIT
0
1
2
FIELD
RESET
R/W
SPR
BIT
16
17
18
FIELD
RESET
R/W
SPR
NOTE: — = Undefined.
DPIV—Development Port Instruction Value
This field is used to fetch an instruction supplied by the development system.
20-60
3
4
5
6
7
DPDV
—
R/W
630
19
20
21
22
23
DPDV
—
R/W
630
3
4
5
6
7
DPIV
—
R
631
19
20
21
22
23
DPIV
—
R
631
MPC823e REFERENCE MANUAL
8
9
10
11
12
24
25
26
27
28
8
9
10
11
12
24
25
26
27
28
13
14
15
29
30
31
13
14
15
29
30
31
MOTOROLA
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