Figure 7-6 Essi Control Register A (Cra) (Essi0 X:$Ffffb5, Essi1 X:$Ffffa5); Figure 7-7 Essi Control Register B (Crb) (Essi0 X:$Ffffb6, Essi1 X:$Ffffa6); Figure 7-8 Essi Status Register (Ssisr) (Essi0 X:$Ffffb7, Essi1 X:$Ffffa7); Essi Programming Model - Motorola DSP56305 User Manual

24-bit digital signal processor
Table of Contents

Advertisement

7.4

ESSI PROGRAMMING MODEL

The ESSI is composed of:
• Two control registers (CRA, CRB)
• One status register (SSISR)
• Three transmit data registers (TX0, TX1, TX2)
• One receive data register (RX)
• Two transmit slot mask registers (TSMA, TSMB)
• Two receive slot mask registers (RSMA, RSMB)
• One special-purpose time slot register (TSR)
The following paragraphs give detailed descriptions and operations of each of the bits in
the ESSI registers. The GPIO functionality of the ESSI is described in Section 7.6 of this
manual.
11
10
9
PSR
23
22
21
SSC1
WL2

Figure 7-6 ESSI Control Register A (CRA) (ESSI0 X:$FFFFB5, ESSI1 X:$FFFFA5)

11
10
9
CKP
FSP
FSR
23
22
21
REIE
TEIE
RLIE

Figure 7-7 ESSI Control Register B (CRB) (ESSI0 X:$FFFFB6, ESSI1 X:$FFFFA6)

11
10
9
23
22
21

Figure 7-8 ESSI Status Register (SSISR) (ESSI0 X:$FFFFB7, ESSI1 X:$FFFFA7)

MOTOROLA
Enhanced Synchronous Serial Interface (ESSI)
8
7
6
PM7
PM6
20
19
18
WL1
WL0
ALC
8
7
6
FSL1
FSL0
SHFD
20
19
18
TLIE
RIE
TIE
8
7
6
RDF
TDE
20
19
18
DSP56305 User's Manual
ESSI Programming Model
5
4
3
PM5
PM4
PM3
17
16
15
DC4
DC3
5
4
3
SCKD
SCD2
SCD1
17
16
15
RE
TE0
TE1
5
4
3
ROE
TUE
RFS
17
16
15
2
1
0
PM2
PM1
PM0
14
13
12
DC2
DC1
DC0
AA0857
2
1
0
SCD0
OF1
OF0
14
13
12
TE2
MOD
SYN
AA0858
2
1
0
TFS
IF1
IF0
14
13
12
AA0859
7-13

Advertisement

Table of Contents
loading

Table of Contents