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6.6.2.6
Host Request (HREQ) Bit 7
HREQ is set and cleared in accordance with the following table:
TREQ
The personal hardware reset clears HREQ.
6.6.2.7
HSTR Reserved Status Bits 31-8
These status bits are reserved for future expansion and read as zeros during host read
operations.
MOTOROLA
RREQ
0
0
cleared
0
1
set if HRRQ = 1
otherwise cleared
1
0
set if HTRQ = 1
otherwise cleared
1
1
set if HTRQ = 1 or HRRQ = 1
otherwise cleared
DSP56305 User's Manual
HOST INTERFACE (HI32)
HOST SIDE Programming Model
HREQ
6-71
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