Port Direction Register (Prr); Figure 7-24 Port Direction Register (Prr); Table 7-5 Port Control Register And Port Direction - Motorola DSP56305 User Manual

Enhanced Synchronous Serial Interface (ESSI)
GPIO/ESSI Selection and GPIO Usage
7.6.2

Port Direction Register (PRR)

The read/write twenty-four-bit Port Direction Register (PRR) controls the data direction
of the ESSI GPIO signals. When PRR[i] is set, the corresponding signal is an output
signal. When PRR[i] is cleared, the corresponding signal is an input signal.
7 6 5
PDC5
STDn
13
15 14
21
23 22
Reserved Bit, Read As Zero, Should Be Written With Zero For Future Compatibility
Note: Either a hardware reset signal or a software reset instruction clear all PRR bits.
The following table describes the port signal configurations.
Table 7-5 Port Control Register and Port Direction Register Bits Functionality
7-54
4 3 2 1
PDC4 PDC3 PDC2 PDC1
SRDn SCKn SCKn2 SCKn1 SCKn0
12 11 10
20 19 18

Figure 7-24 Port Direction Register (PRR)

PC[i] PDC[i]
1 X
0 0
0 1
Note: X: The signal setting is irrelevant to Port
Signal[i] function.
DSP56305 User's Manual
0
0 = Input, 1 = Output
PDC0
PRRC: ESSI0, X:$FFFFBE
PRRD: ESSI1, X:$FFFFAE
9 8
17 16
Port Signal[i] Function
ESSI
GPIO input
GPIO output
AA0689
MOTOROLA