Figure 6-1 Hi32 Block Diagram - Motorola DSP56305 User Manual

24-bit digital signal processor
Table of Contents

Advertisement

HOST INTERFACE (HI32)
HI32 Block Diagram
6.4
HI32 BLOCK DIAGRAM
Figure is a block diagram showing the HI32 registers. They are divided into two banks,
DSP side and Host side.The DSP side registers can be accessed by the DSP56300 core.
They are listed in Table 6-2. Host side registers
Table 6-11.
DSP DMA Data Bus
DSP Global Data Bus
24
24
DPSR
DPCR
DPMC
PCI Configuration Space
CDID
CVID
CSTR
CCMR
CCCR CRID
CHTY CLAT
CBMA
CILP
32
HOST Bus
Note: Five words in UBM
6-10
24
24
24
DPAR
DCTR
HCVR
HSTR
32
32
32

Figure 6-1 HI32 Block Diagram

DSP56305 User's Manual
,
accessed by the host bus, are listed in
24
24
24
24
DSR
DRXR
DTXM
HCTR
HTXR
HRXM
24
data transfer format converter
32
24
24
24
24
DIRH
DTXS
HRXS
24
24
32
MOTOROLA
24
DATH
24

Advertisement

Table of Contents
loading

Table of Contents