Sci Exceptions; Gpio Signals And Registers; Port E Control Register (Pcre) - Motorola DSP56305 User Manual

8.4.5

SCI Exceptions

The SCI can cause five different exceptions in the DSP. These exceptions are as follows
(ordered from the highest to the lowest priority):
1. SCI Receive Data with Exception Status is caused when the Receive Data Register
is full and has a receive error (parity, framing, or overrun). Clearing the pending
interrupt is done by reading the SSR, followed by reading SRX. A long interrupt
service routine should be used to handle the error condition. This interrupt is
enabled by SCR Bit 16 (REIE).
2. SCI Receive Data is caused when the Receive Data Register is full. Reading SRX
clears the pending interrupt. This error-free interrupt can use a fast interrupt
service routine for minimum overhead. This interrupt is enabled by SCR Bit 11
(RIE).
3. SCI Transmit Data is caused when the Transmit Data Register is empty. Writing
STX clears the pending interrupt. This error-free interrupt can use a fast interrupt
service routine for minimum overhead. This interrupt is enabled by SCR Bit 12
(TIE).
4. SCI Idle Line is caused when the receive line enters the idle state (when there
have been ten or eleven bits of 1s transmitted). This interrupt is latched and then
automatically reset when the interrupt is accepted. This interrupt is enabled by
SCR Bit 10 (ILIE).
5. SCI Timer is caused when the baud rate counter reaches zero. This interrupt is
automatically reset when the interrupt is accepted. This interrupt is enabled by
SCR Bit 13 (TMIE).
8.5

GPIO SIGNALS AND REGISTERS

The GPIO functionality of port SCI is controlled by three registers: Port E Control
Register (PCRE), Port E Direction Register (PRRE) and Port E Data Register (PDRE).
8.5.1

Port E Control Register (PCRE)

The read/write 24-bit PCRE controls the functionality of SCI GPIO signals. Each of
PC[2:0] bits controls the functionality of the corresponding port signal. When a PC[i] bit
is set, the corresponding port signal is configured as a SCI signal. When a PC[i] bit is
cleared, the corresponding port signal is configured as a GPIO signal.
MOTOROLA DSP56305 User's Manual
Serial Communication Interface (SCI)
GPIO Signals and Registers
8-29