Address Tracing Enable (Ate)—Omr Bit 15; Operating Mode Register (Omr) - Motorola DSP56305 User Manual

24-bit digital signal processor
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Core Configuration

Operating Mode Register (OMR)

DMA Request Source Bits
DRS4...DRS0
11010
11011
11100
11101
11110
11111
4.7
OPERATING MODE REGISTER (OMR)
The Operating Mode Register (OMR) is a 24-bit read/write register divided into three
byte-sized units. The first two bytes (COM and EOM) are used to control the chip's
operating mode. The third byte (SCS) is used to control and monitor the stack extension.
The OMR control bits are shown in Figure 4-3. Refer to the DSP56300 Family Manual for
a description of the OMR.
4.7.1
Address Tracing Enable (ATE)—OMR Bit 15
The Address Tracing Enable bit (ATE) is used to enable the Address Tracing mode,
which allows the core to reflect the addresses of internal fetches and program space
moves to the Address bus, providing assistance in software development.
4-22
CCOP Cipher Processing Done (CIDN=1)
Reserved
Host Slave Receive Data (SRRQ=1)
Host Master Receive Data (MRRQ=1)
Host Slave Transmit Data (STRQ=1)
Host Master Transmit Data (MTRQ=1)
DSP56305 User's Manual
Requesting Device
MOTOROLA

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