Watchdog Toggle (Mode 10) - Motorola DSP56305 User Manual

24-bit digital signal processor
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Timer/Event Counter
Timer Modes of Operation
the INV bit is set, the pulse polarity is high (logical 1). If the INV bit is cleared, the pulse
polarity is low (logical 0).
The counter contents can be read at any time by reading the TCR. The counter is
reloaded whenever the TLR is written with a new value while the TE bit is set.
Note:
In this mode, internal logic preserves the TIO value and direction for an
additional 2.5 internal clock cycles after the DSP56305 hardware reset signal is
asserted. This ensures that a valid RESET signal is generated when the TIO
signal is used to reset the DSP56305.
9.4.4.2

Watchdog Toggle (Mode 10)

Bit Settings
TC3
TC2
TC1
1
0
1
In this mode, the timer toggles an external signal after a preset period.
Set the TE bit to clear the counter and enable the timer. The value the timer is to count is
loaded into the TCPR. The counter is loaded with the TLR value on the first timer clock
received from either the DSP56305 internal clock divided by two (CLK/2) or the
prescaler clock output. Each subsequent timer clock increments the counter. The TIO
signal is set to the value of the INV bit.
When the counter equals the TCPR value, the TCF bit in the TCSR is set; if the TCIE bit is
also set, a compare interrupt is generated. If the TRM bit is set, the counter is loaded with
the TLR value on the next timer clock and the count is resumed. If the TRM bit is cleared,
the counter continues to be incremented on each subsequent timer clock.
When counter overflow has occurred, the polarity of the TIO output signal is inverted,
and the TOF bit in the TCSR is set; if the TOIE bit is also set an overflow interrupt is
generated. The TIO polarity is determined by the INV bit. On the first transition TIO is
set if INV is cleared and TIO is cleared if INV is set.
The counter is reloaded whenever the TLR is written with a new value while the TE bit is
set. This process is repeated until the timer is disabled by clearing the TE bit. The counter
contents can be read at any time by reading the TCR register.
9-28
TC0
Mode
Name
0
10
Toggle
DSP56305 User's Manual
Mode Characteristics
Kind
Watchdog
TIO
Clock
Output
Internal
MOTOROLA

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