Timer/Event Counter Programming Model - Motorola DSP56305 User Manual

Timer/Event Counter
Timer/Event Counter Architecture
9.2.1 Timer/Event Counter Block Diagram
GDB
24
TPLR
Timer Prescaler
Load Register
21-bit Prescaler
Counter
CLK/2 TIO0 TIO1 TIO2
9.2.2

Timer/Event Counter Programming Model

The programming model for the TEC consists of the 21-bit prescaler counter, the 24-bit
Timer Prescaler Load Register (TPLR), and the 24-bit Timer Prescaler Count Register
(TPCR). Figure 9-3 shows the TEC programming model.
9-4
24
TPCR
Timer Prescaler
Count Register
Figure 9-1 Timer/Event Counter Block Diagram
DSP56305 User's Manual
24
Timer 0
Timer 1
Timer 2
24
AA0673
MOTOROLA