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6.5.1.8
Host Transfer Acknowledge Polarity (HTAP) Bit 15
The HTAP bit controls the polarity of the HTA signal when the HI32 is in a Universal
Bus mode (HM = $2 or $3). If HTAP is cleared, the HTA signal is active high and the
HI32 will request to extend the access by driving the HTA signal low (i.e. deasserted). If
HTAP is set, the HTA signal is active low and the HI32 will request to extend the access
by driving the HTA signal high (i.e. deasserted).
Note:
HTA is driven in the Universal Bus modes (HM = $2 or $3) while the HI32 is
being accessed by an external host. If the HI32 is not being accessed, the HTA
signal is high impedance.
The value of HTAP may be changed only when HACT = 0.
HTAP is ignored when not in a Universal Bus mode (HM
Hardware and software resets clear HTAP.
6.5.1.9
Host DMA Request Polarity (HDRP) Bit 16
The HDRP bit controls the polarity of the HDRQ signal when the HI32 is in a Universal
Bus mode (HM = $2 or $3). If HDRP is cleared, the HDRQ signal is active high and the
HI32 will request DMA service by driving the HDRQ signal high (i.e. asserted). If HDRP
is set, the HDRQ signal is active low and the HI32 will request DMA service by driving
the HDRQ signal low (i.e. asserted).
The value of HDRP may be changed only when HACT = 0.
HDRP is ignored when not in a Universal Bus mode (HM
Hardware and software resets clear HDRP.
6.5.1.10
Host Reset Polarity (HRSP) Bit 17
The HRSP bit controls the polarity of the HRST signal when the HI32 is in a Universal
Bus or the GPIO mode (HM = $2, $3 or $4). If HRSP is cleared, the HRST signal is active
high and the HI32 will be reset if the HRST signal is high (i.e. asserted). If HRSP is set,
the HRST signal is active low and the HI32 will be reset if HRST signal is low (i.e.
asserted).
The value of HRSP may be changed only when HACT = 0.
HRSP is ignored in the PCI mode (HM = $1).
Hardware and software resets clear HRSP.
MOTOROLA
DSP56305 User's Manual
HOST INTERFACE (HI32)
DSP SIDE Programming Model
≠
$2 or $3).
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$2 or $3).
6-15
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