Vwes Bits 7–0; Window Length (Wlen[7:0])—Vwes Bits 15–8; Viterbi Wed Data Register (Vwed); Viterbi Memory Access Register (Vmem) - Motorola DSP56305 User Manual

13.5.11.1 Window Start Location (WSTR[7:0])—VWES Bits 7–0
The Window Start Location (WSTR[7:0]) bits are used to specify the start location of the
WED window in the data block. The value assigned to WSTR[7:0] should be (N–L–1),
where N is the number of decoded bits in the data block and L is the start bit location for
WED computation.
13.5.11.2 Window Length (WLEN[7:0])—VWES Bits 15–8
The Window Length (WLEN[7:0]) bits specify the length of the WED window. The value
assigned to WLEN[7:0] should be the window bit-length minus one.
For example, assuming a GSM half rate speech data block (TCH/HS) of 104 decoded
bits, numbered 1, 2, 3,..., 104, in which the WED window starts at bit 75, and the WED
window length is 25 bits, the following parameters need to be input:
VCNT = block_size – 1 = 104 – 1 = 103 = $67
WSTR = block_size – start_bit – 1 = 104 – 75 – 1 = 28 = $1C
WLEN = window_length – 1 = 25 – 1 = 24 = $18

13.5.12 Viterbi WED Data Register (VWED)

The VWED is a 16-bit read-only data register used for reading the WED value. The
calculation of the WED is enabled by setting WEDE (VCRB Bit 6). The value provided is
the minimal difference in path metrics of all ACS decisions along the survivor path
within the defined window. The window is defined using the VWES register. The
VWED is cleared when the decoding mode is enabled. The WED function is performed
during decoding only.

13.5.13 Viterbi Memory Access Register (VMEM)

The Viterbi Memory Access Register (VMEM) is a 24-bit read/write data register, used
in Memory Access mode to access the VCOP RAM modules (excluding Output Buffer
and Trellis RAM). When accessing 16-bit word data RAM, the data occupies the sixteen
most significant bits of VMEM, zero padded at the [7:0] bits. For the Metric RAM access,
the data bits occupies bits [21:0] of VMEM, zero extended to bits [23:22]. The data
address is defined by the VBER, see Table 13-7 on page 30. WED accuracy, (as given in
the VWED register), is plus or minus one of the correct minimal difference decision
along the surviving path.
MOTOROLA DSP56305 User's Manual
VITERBI CO-PROCESSOR
Programming Model
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