Viterbi Tap Register B (Vtpb); Tap Vector D (Tapd{4:0])—Vtpb Bits 4–0; Tap Vector E (Tape[4:0])—Vtpb Bits 9–5; Tap Vector F (Tapf[4:0])—Vtpb Bits 14–10 - Motorola DSP56305 User Manual

VITERBI CO-PROCESSOR
Programming Model
13.5.8

Viterbi Tap Register B (VTPB)

The Viterbi Tap B register (VTPB) is a 16-bit write-only register containing (during
encoding and decoding) convolutional code tap polynomials. The VTPB is used for the
three most significant polynomials: G
for a existing tap and 0 for a non-existent tap. The tap bits do not include the MSB and
LSB of the polynomial, which are 1 for all codes. Tap values must be programmed before
starting encoding or decoding.
15 14 13 12
TAPF4 TAPF3 TAPF2 TAPF1 TAPF0 TAPE4 TAPE3 TAPE2 TAPE1 TAPE0 TAPD4 TAPD3 TAPD2 TAPD1 TAPD0
Reserved bit, Read as zero.
13.5.8.1 Tap Vector D (TAPD{4:0])—VTPB Bits 4–0
The Tap Vector D (TAPD[4:0]) bits contain the vector 3 taps (G
LSB.
13.5.8.2 Tap Vector E (TAPE[4:0])—VTPB Bits 9–5
The Tap Vector E (TAPE[4:0]) bits contain the vector 4 taps (G
LSB.
13.5.8.3 Tap Vector F (TAPF[4:0])—VTPB Bits 14–10
The Tap Vector F (TAPF[4:0]) bits contain the vector 5 taps (G
LSB.
13.5.8.4 Reserved Bit—VTPB Bit 15
This bit is reserved and should be written with zero.
13-26
, G
5 4
11 10 9 8

Figure 13-13 Viterbi Tap Register B (VTPB)

DSP56305 User's Manual
, G . The polynomial taps are represented as 1
3
7 6 5
5
4 3 2 1
), excluding its MSB and
3
), excluding its MSB and
4
), excluding its MSB and
MOTOROLA
0
AA1322