Master Transmit Interrupt Enable (Mtie) Bit 1; Master Receive Interrupt Enable (Mrie) Bit 2; Master Address Interrupt Enable (Maie) Bit 4; Parity Error Interrupt Enable (Peie) Bit 5 - Motorola DSP56305 User Manual

HOST INTERFACE (HI32)
DSP SIDE Programming Model
6.5.2.1

Master Transmit Interrupt Enable (MTIE) Bit 1

The MTIE bit is used to enable a DSP56300 core interrupt request when the master
transmit data request (MTRQ) status bit in the DPSR is set. If MTIE is cleared, MTRQ
interrupt requests are disabled. If MTIE is set a master transmit data interrupt request
will be generated if MTRQ is set.
Hardware and software resets clear MTIE.
6.5.2.2

Master Receive Interrupt Enable (MRIE) Bit 2

The MRIE bit is used to enable a DSP56300 core interrupt request when the master
receive data request (MRRQ) status bit in the DSP status register (DPSR) is set. If MRIE is
cleared, master receive data interrupt requests are disabled. If MRIE is set, a master
receive data interrupt request will be generated if MRRQ is set.
Hardware and software resets clear MRIE.
6.5.2.3

Master Address Interrupt Enable (MAIE) Bit 4

The MAIE bit is used to enable a DSP56300 core interrupt request when the HI32 is
currently not the PCI transaction initiator, when in the PCI mode (HM=$1). If MAIE is
cleared, master address interrupt requests are disabled. If MAIE is set, a master address
interrupt request will be generated if the master address request (MARQ) status bit in
the DPSR register is set.
Hardware and software resets clear MAIE.
6.5.2.4

Parity Error Interrupt Enable (PEIE) Bit 5

The PEIE bit is used to enable a DSP56300 core interrupt request when a parity error is
detected, when in the PCI mode (HM=$1). If PEIE is cleared, parity error interrupt
requests are disabled. If PEIE is set, a parity error interrupt request will be generated if a
parity error (address or data) is detected and the address parity error (APER) status bit
or the data parity error (DPER) status bit in the DPSR register is set.
Hardware and software resets clear PEIE.
6.5.2.5

Transaction Abort Interrupt Enable (TAIE) Bit 7

The TAIE bit is used to enable a DSP56300 core interrupt request when in the PCI mode
(HM=$1) and the HI32, as a PCI master, has executed a master-abort termination, or
received a target initiated target-abort termination. If TAIE is cleared, transaction abort
interrupt requests are disabled. If TAIE is set, a transaction abort interrupt request will
be generated if a transaction was terminated due to master-abort (MAB is set in the
DPSR) or target-abort (TAB is set).
Hardware and software resets clear TAIE.
6-22 DSP56305 User's Manual MOTOROLA