Host Port Configuration; Host Interface (Hi32) - Motorola DSP56305 User Manual

Signal/Connection Descriptions

Host Interface (HI32)

Table 2-9 Interrupt and Mode Control (Continued)
Signal
Type
Name
MODD Input
IRQD Input
2.8 HOST INTERFACE (HI32)
The Host Interface (HI32) provides a fast parallel data to 32-bit port, which may be
connected directly to the host bus.
The HI32 supports a variety of standard buses, and provides a glueless connection to a
PCI bus and a number of industry-standard microcomputers, microprocessors, DSPs,
and DMA hardware.
2.8.1

Host Port Configuration

The functions of the signals associated with the HI32 vary according to the programmed
configuration of the interface as determined by the 24-bit DSP Control Register (DCTR).
Refer to the DSP56305 User's Manual for detailed descriptions of this and the other
configuration registers used with the HI32.
2-18
State
During
Reset
Input Mode Select D—MODD selects the initial chip operating
mode during hardware reset and becomes a level-sensitive or
negative-edge-triggered, maskable interrupt request input
IRQD during normal instruction processing. MODA, MODB,
MODC, and MODD select one of sixteen initial chip operating
modes, latched into the OMR when the RESET signal is
deasserted.
External Interrupt Request D—IRQD is an active-low
Schmitt-trigger input, internally synchronized to CLKOUT. If
IRQD is asserted synchronous to CLKOUT, multiple
processors can be re-synchronized using the WAIT instruction
and asserting IRQD to exit the Wait state. If the processor is in
the Stop standby state and IRQD is asserted, the processor will
exit the Stop state.
These inputs are 5 V tolerant.
DSP56305 User's Manual
Signal Description
MOTOROLA