Essi Receive Shift Register; Essi Receive Data Register (Rx); Essi Transmit Shift Registers - Motorola DSP56305 User Manual

7.4.4

ESSI Receive Shift Register

The 24-bit Receive Shift Register (see Figure 7-19 and Figure 7-20) receives the incoming
data from the Serial Receive Data signal. Data is shifted in by the selected (internal or
external) bit clock when the associated frame sync I/O is asserted. It is assumed that
data is received Most Significant Bit (MSB) first if SHFD is cleared and Least Significant
Bit (LSB) first if SHFD is set. Data is transferred to the ESSI Receive Data Register after 8,
12, 16, 24, or 32 serial clock cycles are counted, depending on the word-length control
bits in the CRA.
7.4.5

ESSI Receive Data Register (RX)

The Receive Data Register (RX) is a 24-bit read-only register that accepts data from the
Receive Shift Register as it becomes full (see Figure 7-19 and Figure 7-20). The data read
is aligned according to the value of the ALC bit. When the ALC bit is cleared, the MSB is
bit 23 and the least significant byte is unused. When the ALC bit is set, the MSB is Bit 15
and the most significant byte is unused. Unused bits are read as 0s. If the associated
interrupt is enabled, the DSP is interrupted whenever the RX register becomes full.
7.4.6

ESSI Transmit Shift Registers

The three 24-bit Transmit Shift Registers contain the data being transmitted (see
Figure 7-19 and Figure 7-20). Data is shifted out to the Serial Transmit Data signals by
the selected (internal or external) bit clock when the associated frame sync I/O is
asserted. The word-length control bits in the CRA determine the number of bits that
must be shifted out before the shift registers are considered empty and may be written to
again. Depending on the setting of the CRA, the number of bits to be shifted out can be 8,
12, 16, 24, or 32 bits.
The data transmitted is aligned according to the value of the ALC bit. When the ALC bit
is cleared, the MSB is Bit 23 and the least significant byte is unused. When ALC is set, the
MSB is Bit 15 and the most significant byte is unused. Unused bits are read as 0s. Data is
shifted out of these registers MSB first if the SHFD bit is cleared and LSB first if the
SHFD bit is set.
MOTOROLA
Enhanced Synchronous Serial Interface (ESSI)
DSP56305 User's Manual
ESSI Programming Model
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