Pulse Width Modulation (Pwm, Mode 7) - Motorola DSP56305 User Manual

Timer/Event Counter
Timer Modes of Operation
9.4.3

Pulse Width Modulation (PWM, Mode 7)

Bit Settings Mode Characteristics
TC3 TC2 TC1 TC0 Mode Name Kind TIO Clock
0 1 1 1 7 Pulse Width PWM Output Internal
Modulation
In this mode, the timer generates periodic pulses of a preset width.
Set the TE bit to clear the counter and enable the timer. When first timer clock is received
from either the DSP56305 internal clock divided by two (CLK/2) or the prescaler clock
output, the counter is loaded with the TLR value. Each subsequent timer clock
increments the counter.
When the counter value comes to equal the TCPR value (which has been loaded with the
Pulse Width), the TIO output signal is toggled and the TCF bit in the TCSR is set; if the
TCIE bit is set, a compare interrupt is generated. The counter continues to be
incremented on each timer clock. The TLR value determines the output period ($FFFFFF
− TLR + 1). The timer counter increments the initial TLR value and toggles the TIO signal
when the counter value exceeds $FFFFFF.
If counter overflow occurs, the TIO output signal is toggled, the TOF bit in TCSR is set,
and if the TOIE bit is set an overflow interrupt is generated. If the TRM bit is set, the
counter is loaded with the TLR value on the next timer clock and the count is resumed. If
the TRM bit is cleared, the counter continues to be incremented on each timer clock.
This process is repeated until the timer is disabled by clearing the TE bit. The counter
contents can be read at any time by reading the TCR.
TIO signal polarity is determined by the INV bit value. When the counter is started by
setting the TE bit, the TIO output signal assumes the value of the INV bit, to guarantee
the first pin transition will be correct. On each subsequent toggling of the TIO signal, the
polarity of the TIO signal is inverted. For example, if the INV bit is set, the TIO signal
may generate the signal: 1010. If the INV bit is cleared, the TIO signal would generate the
signal: 0101.
The duty cycle of the TIO signal is determined by the TCPR value. When the TLR value
is incremented to be equal to the TCPR value, the TIO signal is toggled. The duty cycle is
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