Measurement Capture (Mode 6) - Motorola DSP56305 User Manual

Timer/Event Counter
Timer Modes of Operation
9.4.2.4

Measurement Capture (Mode 6)

Bit Settings Mode Characteristics
TC3 TC2 TC1 TC0 Mode Name Kind TIO Clock
0 1 1 0 6 Capture Measurement Input Internal
In this mode, the timer counts the number of clocks that elapse between starting the
timer and receiving an external signal.
Set the TE bit to clear the counter and enable the timer. The value the timer is to count is
loaded into the TLR. When the first timer clock signal is received, the counter is loaded
with the TLR value. The timer clock signal can be taken from either the DSP56305 clock
divided by two (CLK/2) or from the prescaler clock output. Each subsequent clock
signal increments the counter.
At the first appropriate transition of the external clock detected on the TIO signal, the
TCF bit in the TCSR is set and if the TCIE bit is set a compare interrupt is generated. The
counter halts. The counter contents are loaded into the TCR. The TCR value represents
the delay between setting the TE bit and detecting the first clock edge signal on the TIO
signal.
The value of the INV bit determines whether a high-to-low (1 to 0) or low-to-high (0 to 1)
transition of the external clock signals the end of the timing period. If the INV bit is set, a
high-to-low transition signals the end of the timing period. If INV is cleared, a
low-to-high transition signals the end of the timing period.
If the counter overflows, the TOF bit is set; if TOIE is set, an overflow interrupt is
generated. The counter contents can be read at any time by reading the TCR.
MOTOROLA DSP56305 User's Manual 9-25