Once Pdb Register (Opdbr); Once Pil Register (Opilr); Figure 10-9 Once Pipeline Information And Gdb Registers - Motorola DSP56305 User Manual

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Figure 10-9 OnCE Pipeline Information and GDB Registers

10.8.1

OnCE PDB Register (OPDBR)

The OnCE Program Data Bus Register (OPDBR) is a 24-bit latch that stores the value of
the Program Data Bus generated by the last program memory access of the core before
the Debug mode is entered. The OPDBR register can be read or written through the
JTAG port. This register is affected by the operations performed during the Debug mode
and must be restored by the external command controller when returning to Normal
mode.
10.8.2

OnCE PIL Register (OPILR)

The OnCE PIL Register (OPILR) is a 24-bit latch that stores the value of the Instruction
Latch before the Debug mode is entered. OPILR can only be read through the JTAG port.
Since the Instruction Latch is affected by the operations performed during the
Note:
Debug mode, it must be restored by the external command controller when
returning to Normal mode. Since there is no direct write access to the
Instruction Latch, the task of restoring is accomplished by writing to OPDBR
with no-GO and no-EX. In this case the data written on PDB is transferred into
the Instruction Latch.
MOTOROLA
GDB Register (OGDBR)
PDB Register (OPDBR)
PIL Register (OPILR)
TCK
DSP56305 User's Manual
On-Chip Emulation Module
Pipeline Information and OGDBR
GDB
TDI
PDB
PIL
AA0709
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