Motorola DSP56305 User Manual page 643

Table D-5 HI32 Programming Model - Quick Reference
HI32 Registers - Quick Reference (Sheet 1 of 8)
Reg Bit #
Mnemonic Name
DSP SIDE
DCTR HCIE Host Command Interrupt
Enable
STIE Slave Transmit Interrupt
Enable
SRIE Slave Receive Interrupt
Enable
HF5-HF3 Host Flags
HINT Host Interrupt A
HDSM Host Data Strobe Mode
HRWP Host RD/WR Polarity
HTAP Host Transfer Acknowledge
Polarity
HDRP Host DMA Request Polarity 0
HRSP Host Reset Polarity
HIRH Host Interrupt Request
Handshake Mode
HIRD Host Interrupt Request Drive
Control
22- HM2-HM0 HI32 Mode
20
MOTOROLA
Val Function
0 HCP interrupt disabled
1 HCP interrupt enabled
0 STRQ interrupt disabled
1 STRQ interrupt enabled
0 SRRQ interrupt disabled
1 SRRQ interrupt enabled
0 HINTA signal is high
impedance
1 HINTA signal is driven low
0 HWR + HRD (double data
strobe)
1 HRW + HDS (single data
strobe)
0 HRW (0 = WRITE, 1 = READ)
1 HRW(0 = READ, 1 = WRITE)
0 HTA
1 HTA
HDRQ
1 HDRQ
0 HRST
1 HRST
0 HIRQ pulsed
1 HIRQ - full handshake
0 HIRQ - open drain
1 HIRQ - driven
000 Terminate and Reset
001 PCI
010 GenBus
011 Enhanced GenBus
100 GPIO
101 Self Configuration
11x Reserved
DSP56305 User's Manual
PROGRAMMING REFERENCE
Comments
may be
changed only
in PS reset
may be
changed only
in PS reset
may be
changed only
in PS reset
may be
changed only
in PS reset
may be
changed only
in PS reset
may be
changed only
in PS reset
HIRQ pulse
width is
defined by
CLAT
may be
changed only
in PS reset
may be
changed to
non-zero
value only in
PS reset
Reset Type
HS PH PS
0 - -
0 - -
0 - -
$0 - -
0
0 - -
0 - -
0 - -
0 - -
0 - -
0 - -
0 - -
$0 - -
D-43