Table 3-5 Memory Locations For Program Ram And Instruction Cache; Table 3-6 Memory Locations For Data Ram; Memory Maps - Motorola DSP56305 User Manual

Table 3-5 Memory Locations for Program RAM and Instruction Cache

MS
0
0
1
1
The actual memory locations for both X and Y data RAM in their own memory space are
determined by the MS bit, and their addresses are listed in Table 3-6.
MS
0
1
3.4

MEMORY MAPS

The following figures describe each of the memory space and RAM configurations
defined by the settings of the SC, MS, and CE bits. The figures show the configuration
and the table describes the bit settings, memory sizes, and memory locations.
MOTOROLA
Program RAM
CE
0 $000000–$0019FF
1 $000000–$0015FF
0 $000000–$001DFF
1 $000000–$0019FF

Table 3-6 Memory Locations for Data RAM

X data RAM Location
$000000–$000EFF
$000000–$000AFF
DSP56305 User's Manual
Cache Location
Location
$001600–$0019FF
$001A00–$001DFF
Y data RAM Location
$000000–$0007FF
$000000–$0007FF
Memory Configuration
Memory Maps
N/A
N/A
3-11